1. Field of the Invention
The present invention relates to a digital signal processor (hereinafter called "DSP") which receives digital signals, such as digital audio signals, and executes pipeline processing.
2. Description of the Related Art
In executing an operation according to commands in one step of a program, a DSP requires at least three stages of processing: a stage for reading out commands of the program, a stage for decoding the read-out commands, and a stage for executing the decoded commands. The "pipeline processing" is to put a plurality of commands through these three stages in order for each machine cycle, idealistically eliminating wasteful cycles.
According to the conventional DSP, however, when the pipeline processing is accompanied with a jump command which needs the result of an arithmetic operation done by an ALU, the flow of the pipeline is disturbed, requiring a wasteful cycle called "delay slot". Further, since the result of the jump command would appear two steps later, programming becomes significantly difficult.